In the art of computer technology, it is typical to employ peripheral devices that use a common signal format for transmitting data to and from a host computer. Or, if a device using a different format were used, an elaborate circuit scheme was used to convert from one format (e.g., differential) to another (such as single-ended). Such prior art circuitry was expensive and slow.
To meet the requirements for SCSI (Small Computer System Interface), high performance and simplicity of the peripheral devices are paramount. The widespread and growing acceptance of SCSI is largely a function of the combination of simplicity and the functionality it offers. SCSI is a bus architecture, and as such dictates a set of standard signal protocols. A bus can support up to eight separate addresses. The architecture allows for multiple host connections and peripheral devices to coexist on the same bus. With one host connected to the bus, the remaining seven addresses can be used to attach up to seven peripheral devices.
Most peripheral interfaces support a master/slave relationship, with the host as the master and the peripheral as the slave. This arrangement is satisfactory in the high end of the market where the complex disk subsystems include multiple controllers, multiple ports and multiple paths. However, these sophisticated devices are cost-prohibitive in the entry/medium computer system marketplace. SCSI can provide substantial functionality in this area because of its peer-to-peer design. Any device attached to a SCSI bus may either assume the role of the requestor of services or the supplier of services. A device may change its role whenever required. During any particular transaction the device requesting the service is called the initiator, while the device requested to provide the service is called the target. When two or more hosts are attached to a common bus, each has visibility to any attached peripheral.
All SCSI commands are high-level logical commands. This removes the requirement for initiators to "understand" the detailed operation of the targets. All bus data transfers are independent of the timing constraints of the peripheral devices. Data is transferred from the device buffers at bus speed rather than device speed.
From the foregoing it can be seen that in a system employing peripheral devices having different signal formats, circuitry will be required to convert back and forth between formats at a high rate of speed.